1. Field of the Invention
The present invention relates to a technology for transmitting signals among a plurality of large scale integration (“LSI”) chips, among a plurality of elements in a chip or among a plurality of circuit blocks, or for transmitting signals, at high speed, among a plurality of boards or among a plurality of housings. More particularly, the present invention relates to a timing signal generating system, for transmitting signals at high speed, and to a receiving circuit.
2. Description of the Related Art
Recently, the performance of components used in computers and other information processing apparatuses has been greatly improved. In particular, dramatic improvements have been made, for example, in the performance of processors and semiconductor memory devices such as SRAMs (Static Random Access Memories) and DRAMs (Dynamic Random Access Memories). The improvements in the performance of semiconductor memory devices, processors, and the like have come to the point where system performance cannot be improved further unless the speed of signal transmission between components or elements is increased.
Specifically, the speed of signal transmission between, for example, a main storage unit such as DRAM and a processor (between LSIs) is hindering the effort for improving the performance of the computer as a whole. Besides, it is becoming necessary to increase the speed of signal transmission not only between the housing and the board (printed wiring board), such as between a server and a main storage unit or between the servers through a network, but also among the chips, among the elements in the chip and among the circuit blocks due to a high degree of integration of the semiconductor chip, an increase in the size thereof, and a decrease in the power source voltage (decrease in the signal amplitude). Realizing high-speed signal transmission requires a timing signal generating system (receiving circuit) having a synchronizer, and it has been desired to provide a timing signal generating system featuring a short processing time with a small amount of circuitry.
The prior art and the problems associated with the prior art will be described in detail later with reference to accompanying drawings.